DocumentCode
3399302
Title
Modeling and separate extraction of bias-dependent and bias-independent S/D resistances in MOSFETs
Author
Zebang Guo ; Zuochang Ye ; Xiaojian Li ; Yan Wang
Author_Institution
Dept. of Microelectron. & Nanoelectron., Tsinghua Univ., Beijing, China
fYear
2012
fDate
Oct. 29 2012-Nov. 1 2012
Firstpage
1
Lastpage
3
Abstract
S/D resistance extraction is important in technology development to help extraction of channel carrier mobility and pinpoint the bottleneck of MOSFET performance. In this paper, a new method is proposed for accurate extraction of bias-dependent and bias-independent S/D resistances of advanced MOSFETs. This method is carried on an n-MOSFET with W/L=9um/60nm, and the results fit the experimental data accurately.
Keywords
MOSFET; carrier mobility; electric resistance; semiconductor device models; MOSFET performance bottleneck; bias-dependent source-drain resistance; bias-independent source-drain resistance; channel carrier mobility; separate extraction; size 60 mum; size 9 mum; Bipolar transistors; Data models; Fitting; Logic gates; MOSFETs; Resistance; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-2474-8
Type
conf
DOI
10.1109/ICSICT.2012.6466734
Filename
6466734
Link To Document