The short-channel threshold voltage model for junctionless surrounding-gate MOSFETs

Author

Chiang, T.K. ; Chang, D.H.

Author_Institution

Dept. of Electr. Eng., Nat. Univ. of Kaoshiung, Kaoshiung, Taiwan

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

4

Abstract

Based on the quasi-2D scaling equation, a new threshold voltage model for short-channel junctionless cylindrical, surrounding-gate (JLCSG) MOSFETs is developed. The model explicitly shows how the device parameters of the silicon thickness, oxide thickness, drain bias, and channel length affect the threshold voltage behavior. The model can also be extendable to its counterpart of junction-based cylindrical, surrounding-gate (JBCSG) MOSFETs. The model is velidated by the 3D numerical simulator and can be easily used to explore the threshold voltage characteristics of junctionless cylindrical, surrounding-gate MOSFETs for its simple formula and computational efficiency.

Keywords

MOSFET; semiconductor device models; channel length; device parameter; drain bias; junctionless surrounding gate MOSFET; oxide thickness; quasi2D scaling equation; short channel junctionless cylindrical surrounding gate; short channel threshold voltage model; silicon thickness; Electric potential; Logic gates; MOSFETs; Mathematical model; Semiconductor device modeling; Silicon; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6466738

Filename

6466738