DocumentCode :
3399529
Title :
A low power CMOS circuit with variable source scheme (VSCMOS)
Author :
Yasuda, Takeo ; Hosokawa, Kohji
Author_Institution :
Semicond. Technol. Dev. Eng. & Technol. Service, IBM Japan, Shiga, Japan
fYear :
2003
fDate :
21-24 Jan. 2003
Firstpage :
404
Lastpage :
407
Abstract :
This paper proposes a method to reduce the standby leakage current of MOSFET by controlling the voltage of the source node. The method allows the use of a low threshold device for high performance speed and low power dissipation in both active and standby periods. This method can be easily applied for conventional ASIC library circuits because no additional processes, circuits, or devices except slight modification for the body contact cell are required.
Keywords :
CMOS logic circuits; application specific integrated circuits; circuit simulation; integrated circuit design; integrated circuit modelling; leakage currents; low-power electronics; ASIC library circuits; CMOS variable source scheme; MOSFET leakage current; VSCMOS; active periods; body contact cell; device speed performance; low power CMOS circuit; low power consumption; low power dissipation; low threshold device; source node voltage control; standby leakage current reduction; standby periods; CMOS technology; Energy consumption; Equations; Leakage current; MOSFET circuits; Power MOSFET; Power supplies; Switches; Threshold voltage; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN :
0-7803-7659-5
Type :
conf
DOI :
10.1109/ASPDAC.2003.1195049
Filename :
1195049
Link To Document :
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