Title :
Miss rate analysis of cache oblivious matrix multiplication using sequential access recursive algorithm and normal multiplication algorithm
Author :
Sree Kumar, C. ; Pattnaik, Bhawani Shankar
Author_Institution :
Dept. of Comput. Sci., Nat. Inst. of Sci. & Technol., Berhampur, India
Abstract :
Cache oblivious algorithms are designed to get the good benefit from any of the underlying hierarchy of caches without the need to know about the exact structure of the cache. These algorithms are cache oblivious i.e., no variables are dependent on hardware parameters such as cache size and cache line length. Optimal utilization of cache memory has to be done in order to get the full performance potential of the hardware. We present here the miss rate comparison of cache oblivious matrix multiplication using the sequential access recursive technique and normal multiplication program. Varying the cache size the respective miss rates in the L1 cache are taken and then comparison is done. It is found that the miss rates in the L1 cache for the cache oblivious matrix multiplication program using the sequential access recursive technique is comparatively lesser than the naive matrix multiplication program.
Keywords :
cache storage; mathematics computing; matrix multiplication; L1 cache; cache hierarchy; cache line length; cache oblivious algorithm design; cache oblivious matrix multiplication; cache size; hardware parameters; miss rate analysis; normal multiplication algorithm; optimal cache memory utilization; sequential access recursive scheme algorithm; Algorithm design and analysis; Cache memory; Computers; Hardware; Matrix converters; Memory management; Random access memory; Cache oblivious; block recursive structure; cache memory; matrix multiplication; sequential access;
Conference_Titel :
Emerging Trends in Communication, Control, Signal Processing & Computing Applications (C2SPCA), 2013 International Conference on
Conference_Location :
Bangalore
Print_ISBN :
978-1-4799-1082-3
DOI :
10.1109/C2SPCA.2013.6749402