Novel FIR implementation for acoustic signal processing

This paper proposes a novel FIR filter hardware implementation. In applications where acoustic signals are processed (acoustic echo cancellation, reverberation, digital audio effects) the required orders of the filters might be too high to fit into hardware platforms for real-time processing The number of delay elements required by traditional FIR implementations equals to the filter order. Our proposal explores the capability to process acoustic signals at much higher frequencies than the sampling rate. The resulting hardware requires two memories, one used to store the signal samples and the other one for the filter coefficients. The hardware also requires one multiplier and an accumulator. The feasibility of the proposed system is proven by the implementation of a digital reverberator on an FPGA platform.