FPGA implementation of efficient FIR Filter with quantized fixedpoint coefficients

Finite Impulse Response (FIR) Filters is a digital filter which is used in digital signal processing like communicate-on, biomedical signal processing, image processing, etc. These Digital filters are used to filter out the part of signal that is redundant or damages the original signal. In this paper we have implemented a design of digital FIR filter using Finite State Machine (FSM). In this approach it is possible to reuse the hardware implemented so that the area will be reduced significantly, and also the delay and power will be reduces as compared to the MATLAB - Simulink based FIR Filters. In this design the filter coefficients used are fixed-point coefficients, which will reduce the truncation and computation complexity.