DocumentCode
3400199
Title
The design of an i8080A instruction compatible processor with extended memory address
Author
Kon, Chiaki ; Shimizu, Naohiko
Author_Institution
Graduated Sch. of Eng., Tokai Univ., Kanagawa, Japan
fYear
2003
fDate
21-24 Jan. 2003
Firstpage
571
Lastpage
572
Abstract
Computer systems with 8080 or compatible processor and CP/M were most popular from the end of the 70´s to early in the 80´s. We designed an 8080 compatible processor with MMU and implement it on an FPGA as a CP/M system.
Keywords
field programmable gate arrays; integrated circuit design; logic design; microprocessor chips; storage management chips; 8080 microprocessor; CP/M computer systems; FPGA; MMU; extended memory address; i8080A instruction compatible processor; Computer aided instruction; Control systems; Design engineering; Embedded computing; Field programmable gate arrays; Logic; Random access memory; Read only memory; Read-write memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN
0-7803-7659-5
Type
conf
DOI
10.1109/ASPDAC.2003.1195083
Filename
1195083
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