DocumentCode
3400261
Title
Finding the best system design flow for a high-speed JPEG encoder
Author
Sakiyama, Kazuo ; Schaumont, Patrick R. ; Verbauwbede, I.M.
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
2003
fDate
21-24 Jan. 2003
Firstpage
577
Lastpage
578
Abstract
26 students at the University of California, Los Angeles (UCLA) studied system level design methodologies through the design of a high-speed JPEG encoder. The results produced by 5 different design flows onto various target platforms demonstrate the high impact of tools on design quality.
Keywords
circuit CAD; high level synthesis; image coding; integrated circuit design; design methodology; design quality; design tool support; high-level design; high-speed JPEG encoder; system level design flow; varying target platforms; Conducting materials; Design methodology; Energy efficiency; Field programmable gate arrays; Hardware; Image coding; Silicon; Springs; System-level design; Transform coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN
0-7803-7659-5
Type
conf
DOI
10.1109/ASPDAC.2003.1195086
Filename
1195086
Link To Document