Title :
Integer linear programming-based synthesis of skewed logic circuits
Author :
Cao, Aiqun ; Sirisantana, Naran ; Koh, Cheng-Kok ; Roy, Kaushik
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
We present an integer linear programming-based approach for solving the logic reconvergence problem in skewed logic circuits with minimal logic duplication cost. A simplification technique is applied to reduce the complexity of the ILP problem greatly so that the run time is more affordable. Experimental results show that an average of 18% of original gates are duplicated in skewed logic circuits, whereas 65% in Domino logic circuits are duplicated. The average power saving over Domino logic circuits is 40.9%.
Keywords :
CMOS logic circuits; circuit CAD; circuit complexity; circuit optimisation; integer programming; linear programming; logic CAD; Domino logic circuits; average power saving; duplicated gates; integer linear programming-based synthesis; logic reconvergence problem; minimal logic duplication cost; monotonic static CMOS logic; problem complexity; run time; simplification technique; skewed logic circuits; CMOS logic circuits; Circuit synthesis; Clocks; Costs; Impedance; Logic circuits; Logic gates; Network topology; Pulse inverters;
Conference_Titel :
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN :
0-7803-7659-5
DOI :
10.1109/ASPDAC.2003.1195131
