• DocumentCode
    3401431
  • Title

    A family of CMOS floating point arithmetic chips

  • Author

    Manager, John A. Eldon

  • Author_Institution
    Advanced Development, TRW LSI Products La Jolla, California
  • fYear
    1985
  • fDate
    4-6 June 1985
  • Firstpage
    101
  • Lastpage
    107
  • Abstract
    Although the advantages of floating point arithmetic have long been recognized, hardware complexity and expense have impeded its use in high speed digital signal processing (DSP). Now, however, the availability of a growing number of fast dedicated floating point adder and multiplier chips is spurring renewed interest in floating point for real time filtering and spectral analysis.
  • Keywords
    Adders; Finite impulse response filter; Hardware; Multiplexing; Noise; Pipeline processing; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Arithmetic (ARITH), 1985 IEEE 7th Symposium on
  • Conference_Location
    Urbana, IL,
  • Type

    conf

  • DOI
    10.1109/ARITH.1985.6158945
  • Filename
    6158945