Random number generation based on digital differential chaos

Author

Zidan, Mohammed Affan ; Radwan, A.G. ; Salama, Khaled N.

Author_Institution

Electr. Eng. Program, King Abdullah Univ. of Sci. & Technol. (KAUST), Thuwal, Saudi Arabia

fYear

2011

fDate

7-10 Aug. 2011

Firstpage

1

Lastpage

4

Abstract

In this paper, we present a fully digital differential chaos based random number generator. The output of the digital circuit is proved to be chaotic by calculating the output time series maximum Lyapunov exponent. We introduce a new post processing technique to improve the distribution and statistical properties of the generated data. The post-processed output passes the NIST Sp. 800-22 statistical tests. The system is written in Verilog VHDL and realized on Xilinx Virtex^® FPGA. The generator can fit into a very small area and have a maximum throughput of 2.1 Gb/s.

Keywords

Lyapunov methods; chaos generators; digital circuits; digital differential analysers; electronic engineering computing; field programmable gate arrays; hardware description languages; random number generation; statistical analysis; NIST Sp. 800-22 statistical tests; Verilog VHDL; Xilinx Virtex FPGA; digital circuit; digital differential chaos; fully digital differential chaos based random number generator; output time series maximum Lyapunov exponent; random number generation; statistical property; Chaos; Cryptography; Logic gates; Table lookup; World Wide Web;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on

Conference_Location

Seoul

ISSN

1548-3746

Print_ISBN

978-1-61284-856-3

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2011.6026266

Filename

6026266