DocumentCode
3401819
Title
High-speed computation of unary functions
Author
Ohhashi, M. ; Schneider, R.K.
Author_Institution
Toshiba Corporation, Kawasaki, 210 Japan
fYear
1985
fDate
4-6 June 1985
Firstpage
82
Lastpage
85
Abstract
This paper presents an architecture for fast evaluation of unary functions such as reciprocal, square root and reciprocal square root. The theory behind the architecture has been presented in [1]. The paper shows the results of extensive simulation that have allowed us to implement the architecture with minimum chip count and maximum accuracy. The accuracy is about 8 % error rate in the LSB of the chosen representation (IEEE 32-bit floating point format). This architecture allows the computation of unary functions in less than 200 nsec.
Keywords
Accuracy; Approximation methods; Computer architecture; Error analysis; Hardware; Read only memory; Taylor series;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1985 IEEE 7th Symposium on
Conference_Location
Urbana, IL,
Type
conf
DOI
10.1109/ARITH.1985.6158968
Filename
6158968
Link To Document