• DocumentCode
    3401977
  • Title

    Analog macromodeling of digital elements in SPICE

  • Author

    Divekar, D. ; Raghuram, R. ; Ishikawa, H. ; Wang, P.

  • Author_Institution
    CONTEC Microelectronics USA Inc., San Jose, CA, USA
  • fYear
    1991
  • fDate
    14-17 May 1991
  • Firstpage
    376
  • Abstract
    An approach to the accurate simulation of digital elements in a circuit simulator is described. The approach gives more detailed time-domain waveforms than logic simulation. It is more than an order of magnitude faster than transistor-level simulation, but has comparable accuracy. As the simulation is completely in the analog domain, no analog-digital interfaces are required. One can freely mix analog and digital elements, and all features of circuit simulators such as sensitivity analysis and pole-zero analysis are available. Special primitives built into SPICE can greatly facilitate macromodeling of digital elements. Details of the implementation of the primitives in SPICE 3c1 are given. The modeling of chips in the TTL (transistor-transistor logic) family is considered as an example. The analysis of an analog-to-digital converter is also given to bring out the mixed signal capability of this approach
  • Keywords
    SPICE; circuit analysis computing; logic CAD; poles and zeros; sensitivity analysis; SPICE; TTL; analog domain; analog-to-digital converter; circuit simulator; digital elements; macromodeling; mixed signal capability; pole-zero analysis; sensitivity analysis; time-domain waveforms; Analytical models; Circuit simulation; Computational modeling; Computer aided engineering; Delay; Digital circuits; Flip-flops; Logic circuits; SPICE; Sensitivity analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    0-7803-0620-1
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1991.252175
  • Filename
    252175