DocumentCode :
3402545
Title :
Reversible adder/subtractor with overflow detector
Author :
Sultana, Shabana ; Radecka, Katarzyna
Author_Institution :
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents an efficient way to realize a reversible n-bit subtractor circuit incorporating a reversible full adder based on 2´s Complement computation. We propose a reversible controlled adder/subtractor (RCAS) block used in a construction of an adder/subtractor where the negative numbers are transformed to 1´s Complement number. Our circuit is better than existing ones in terms of quantum cost and garbage outputs. Moreover, we propose a novel design to detect an overflow in 2´s Complement computation using modified RCAS block.
Keywords :
adders; sensors; garbage outputs; modified RCAS block; overflow detector; quantum cost; reversible controlled adder; reversible controlled subtractor; reversible full adder; reversible n-bit subtractor circuit; Adders; Logic gates; Quantum computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026310
Filename :
6026310
Link To Document :
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