Sub-10 µW CMOS wake-up receiver IP for green SoC designs

Minimizing waste of resources by reduction of battery replacements in mobile smart objects gives an electronic system a green attribute. Wireless communication is mandatory for modern smart systems. As the receiver´s power consumption dominates the total power budget, novel power reduction techniques are recommended. This paper proposes an ultra-low power UHF wake-up receiver IP in a 130 nm CMOS technology. The power consumption is scalable between 3 μW and 28 μW. In contrast to common polling receivers with reaction times of more than 1 second, this novel fully integrated 868 MHz wake-up receiver depicts reaction times between 30 ms and 484 ms. The core size is 1.0 mm². The sensitivity is -83 dBm. Adding such an ultra-low power IP to a SoC circuit, a quick radio interface for remote access on demand is provided and enables a broad variety of innovative applications: remote sensor readout, wireless body area networks, wireless authentification, localisation and asset tracking in logistics and health-care_.