• DocumentCode
    3403352
  • Title

    Efficient one-pass chase soft-decision BCH decoder for multi-level cell NAND flash memory

  • Author

    Xinmiao Zhang ; Jiangli Zhu ; Yingquan Wu

  • fYear
    2011
  • fDate
    7-10 Aug. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    BCH codes are adopted in multi-level cell NAND flash memory to increase the storage reliability. Compared with hard-decision decoding of BCH codes, the soft-decision Chase algorithm can achieve significant coding gain by carrying out decoding trials on 2η test vectors. To reduce the complexity of the Chase decoding, a one-pass scheme can be employed to derive the error locators of all test vectors in one run. In this paper, a novel technique is first proposed to reduce the latency and simplify the computation scheduling of the one-pass Chase decoding. Then efficient architectures are developed for the modified one-pass decoding. The hardware complexity of the proposed decoder with η = 4 is analyzed for a (4200, 4096) BCH code. Compared to other soft-decision BCH decoding algorithms, it can achieve much better performance-complexity tradeoff.
  • Keywords
    BCH codes; NAND circuits; circuit reliability; decoding; flash memories; decoding trials; hard-decision decoding; multilevel cell NAND flash memory; one-pass chase soft-decision BCH decoder; performance-complexity tradeoff; storage reliability; Computer architecture; Decoding; Logic gates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
  • Conference_Location
    Seoul
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-61284-856-3
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2011.6026354
  • Filename
    6026354