Treat thy secondary (ALMOST) like thy primary- A fair arbiter in master-slave configuration

The paper presents an efficient design of a fast and fair arbiter, arbitrating between multiple bus-masters claiming simultaneous bus-accesses. Today´s complex designs may have large number of requestors, where not all have the same bus bandwidth requirements. We consider two flavors of requests: primary and secondary. Presented here is an area and cycle optimized design where all accesses, whether primary or secondary, are essentially treated equal, with the lower bandwidth requirement of secondary requests factored in. This is done by developing a means of not halting the arbiter if a secondary request cannot be serviced due to path blockage, as against the primary requests.