DocumentCode :
3403833
Title :
A high-level design exploration of heterogeneous adders based on Mixed Integer Linear Programming
Author :
Sosa, J. ; Montiel-Nelson, J.A. ; Garcia-Montesdeoca, J.C. ; Nooshabadi, Saeid
Author_Institution :
Dept. of Electron. Eng. & Automatics, Univ. of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, we present a novel methodology based on Mixed Integer Linear Programming (MILP) for obtaining the complete design tradeoff curve of heterogeneous adders. For each optimal design point of the tradeoff curve, our approach determines both the number of subadders, the architecture of each subadder and the bit width of each subadder. In order to reduce the number of binary variables in the formulation of the MILP, we introduce a new modeling of non-convex curves. Comparisons using five different adder architectures implemented in a standard cells 65nm CMOS technology are shown. Experimental results reveal that the proposed design space exploration methodology is better, when compared with the best published work, up to 11.73 times and 2.16 times in average in terms of CPU time.
Keywords :
CMOS logic circuits; adders; integer programming; linear programming; logic design; CMOS technology; MILP; binary variables; design space exploration methodology; heterogeneous adders; high-level design exploration; mixed integer linear programming; nonconvex curve modeling; subadders; tradeoff curve optimal design point; Adders; Delay; Engines; IP networks; Programming; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026380
Filename :
6026380
Link To Document :
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