Ultra-low voltage integrated receivers in nanoscale CMOS

CMOS process scaling has lead to lower supply voltages for transistors. The sub-1V supply voltage in modern CMOS nanoscale processes coupled with the need to provide highly integrated solutions in embedded applications requires us to rethink the design of analog and RF circuits. We present design techniques for RF transceivers operating from ultra voltage (ULV) supplies in standard digital processes. In this paper we systematically look at the architectural and circuit design techniques that enable the robust design of ULV wireless receivers. We will present three integrated receivers operating from 0.5-0.6V that target WPAN and wide-area cellular network applications.