Title :
Noise immunity improvement in the RESET signal of DDR3 SDRAM memory module
Author :
Seung Mo Jung ; Jong Hyun Seok ; Ho Jin Yoo ; Do Hyung Kim ; You Keun Han ; Woo Seop Kim ; Joo Sun Choi ; Jun Dong Cho
Author_Institution :
Sungkyunkwan Univ., Suwon, South Korea
Abstract :
In asynchronous RESET signal in DDR3 SDRAM memory module, noise is sensitive at certain specific frequency with low voltage. In this paper, our comprehensive measurement verifies that the RESET signal with specific frequency is changed into “Low” due to the noise (i.e., resonance and crosstalk) that results in system halt. Furthermore, we provide a design guideline to JEDEC memory module PCB sponsors to remedy the noise problem in the RESET signal with providing a specific design topology.
Keywords :
DRAM chips; asynchronous circuits; integrated circuit design; integrated circuit measurement; integrated circuit noise; modules; printed circuit design; DDR3 SDRAM memory module; JEDEC memory module PCB; asynchronous RESET signal; crosstalk; noise immunity improvement; Abstracts; SDRAM; Switches; Topology;
Conference_Titel :
SOC Conference (SOCC), 2013 IEEE 26th International
Conference_Location :
Erlangen
DOI :
10.1109/SOCC.2013.6749713
