Design automation flow for voltage adaptive optimum granularity LITHE for sequential circuits

Runtime Active Leakage Control (RALC) techniques like Power Gating (PG) and Reverse Body Biasing (RBB) being the primary candidates, several novel techniques such as Light V_th Hopping (LITHE) [3] with reduced substrate biasing have proven to be beneficial. The intention of LITHE is to reduce the Energy Breakeven Time (EBT) of the circuit, leading to frequent application of RBB. There are several problems that arise while integrating LITHE in a design flow. In this paper, a generic flow from RTL to spice incorporating the LITHE technique at near-optimum granularity is proposed. The problems of control transistor sizing and control signal generation is also addressed. A preprocessing clustering algorithm is applied to extend LITHE technique to sequential circuits. The entire flow has been developed using a 90 nm library developed from Synopsys PDK and has been verified on designs with varying complexities.