DocumentCode :
3404359
Title :
Substrate bias considerations for low leakage 16nm p-channel carbon nanotube transistors
Author :
Yanan Sun ; Kursun, V.
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
The influence of substrate bias voltage on p-type carbon nanotube MOSFET (CN-MOSFET) performance is investigated in this paper. Tradeoffs between subthreshold leakage current and device speed are evaluated with two different substrate bias voltages. P-channel CN-MOSFETs are optimized for achieving the maximum on-state to off-state current ratio (Ion/Ioff) with a higher substrate bias voltage. Connecting the substrate to the power supply is recommended for enhanced overall switch quality in p-channel carbon nanotube transistors.
Keywords :
MOSFET; carbon nanotubes; substrates; MOSFET; enhanced overall switch quality; low leakage p-channel carbon nanotube transistors; substrate bias considerations; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026407
Filename :
6026407
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3404359
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