DocumentCode
3404677
Title
A design of image reject mixer for DTV tuner
Author
Kao, Yao-Huang ; Yu, Ching-Jung
Author_Institution
Inst. of Commun. Eng., National Chiao-Tung Univ., Hsin-Chu, Taiwan
Volume
2
fYear
2005
fDate
4-7 Dec. 2005
Abstract
An image reject mixer of Hartley type for the digital TV tuner was designed. It consists of highly linear mixers, wide band polyphase filters, and an adder. The precise quadrature phase against process variation is specially focused. The rejection ratio is aimed at 30dB. The chip was fabricated by TSMC 0.25um 1P5M CMOS process.
Keywords
CMOS integrated circuits; adders; digital filters; digital television; integrated circuit design; mixers (circuits); tuning; 0.25 micron; CMOS process; Hartley type mixer; adder circuits; digital TV tuner; image reject mixer; linear mixers; quadrature phase; wide band polyphase filters; Adders; Bandwidth; CMOS process; Digital TV; Frequency conversion; Mixers; Radio frequency; SAW filters; Tuners; Wideband; DTV; Hartley Architecture; Image Reject Mixer; Polyphase filter;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN
0-7803-9433-X
Type
conf
DOI
10.1109/APMC.2005.1606405
Filename
1606405
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