Title :
A 1.44-mW 96-dB SNR Sigma-Delta modulator with low-power OPAMP
Author :
Wang, Yongsheng ; Li, Yuanhong ; Zhang, Yonglai ; Yu, Mingyan
Author_Institution :
Micro-Electron. Dept., Harbin Inst. of Technol., Harbin, China
Abstract :
A high-precision, low-power Sigma-Delta modulator has been designed with SMIC 0.18-μm CMOS process. It adopts a third-order feed-forward architecture with zeros optimization technology which is more appropriate for low-power design. Feed-forward architecture reduces the modulator´s sensitivity of the circuit non-idealities. Zeros optimization technology enhances the maximum signal to noise ratio (SNR) can be achieved, and a high performance low-power operational amplifier (op-amp) is designed to decrease the integrating leak. The modulator is implemented by fully-differential switched-capacitor (SC) circuit. Simulation result shows that a peak SNR of 96 dB is obtained for a 1 KHz signal bandwidth, while it consumes only 1.44mW from a 1.8V supply.
Keywords :
CMOS analogue integrated circuits; circuit optimisation; integrated circuit design; low-power electronics; operational amplifiers; sigma-delta modulation; switched capacitor networks; SMIC CMOS process; bandwidth 1 kHz; circuit nonidealities; fully-differential switched-capacitor; high performance low-power operational amplifier; high-precision low-power sigma-delta modulator; low-power OPAMP; low-power design; modulator sensitivity; noise figure 96 dB; power 1.44 mW; signal to noise ratio; size 0.18 mum; third-order feed-forward architecture; voltage 1.8 V; zeros optimization technology; Capacitors; IEEE Press; Modulation; Optimization; Sigma delta modulation; Signal to noise ratio; Advanced SC Integrator; Feed-forward Architecture; Low-Power; Sigma-Delta Modulator; Zeros optimization;
Conference_Titel :
Optoelectronics and Microelectronics Technology (AISOMT), 2011 Academic International Symposium on
Conference_Location :
Harbin
Print_ISBN :
978-1-4577-0794-0
DOI :
10.1109/AISMOT.2011.6159389
