DocumentCode :
3405622
Title :
An implementation of bit synchronization of ultra-shortwave hop-frequency transceiver based on FPGA
Author :
Shuqin, Lou ; Xiaolin, Liu ; Rongli, Zhao
Author_Institution :
Coll. of Electron. & Information Eng., Beijing Jiaotong Univ., China
Volume :
1
fYear :
2004
fDate :
31 Aug.-4 Sept. 2004
Firstpage :
531
Abstract :
A novel bit synchronization of ultra-shortwave hop-frequency transceiver is presented along with its FPGA implementation. Track and adjustment were realized with the precision of less than F/16 at 200 hops per second hop-frequency speed. Compared with traditional method, the reliability and synchronous track precision has been improved. The design scheme has been developed using a hardware description language (VHDL), which provides great flexibility and technology independence.
Keywords :
field programmable gate arrays; frequency hop communication; hardware description languages; synchronisation; telecommunication computing; transceivers; FPGA; VHDL; bit synchronization; field programmable gate array; hardware description language; hop-frequency speed; synchronous track precision; ultra-shortwave hop-frequency transceiver; Array signal processing; Background noise; Clocks; Field programmable gate arrays; Hardware design languages; Protocols; Signal detection; Synchronization; Transceivers; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing, 2004. Proceedings. ICSP '04. 2004 7th International Conference on
Print_ISBN :
0-7803-8406-7
Type :
conf
DOI :
10.1109/ICOSP.2004.1452699
Filename :
1452699
Link To Document :
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