DocumentCode :
3405832
Title :
Fault-based automatic test generator for linear analog circuits
Author :
Nagi, N. ; Chatterjee, A. ; Balivada, A. ; Abraham, J.A.
Author_Institution :
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
fYear :
1993
fDate :
7-11 Nov. 1993
Firstpage :
88
Lastpage :
91
Abstract :
Recognizing that specification testing of analog circuits involves a high cost and lacks any quantitative measure of the testing process, we adopt a fault-based technique. With the help of hierarchical fault models for parametric and catastrophic faults, and a very efficient fault simulator, our simulation-assisted technique automatically determines the test frequencies to detect AC faults in linear analog circuits. By a suitable choice of parameters in the test generator, we can either determine the best test (maximize the error between the good and the faulty responses) for every fault (resulting in a large test set), or generate the smallest test set for all the faults. Finally, fault coverage values provide a quantitative evaluation of the final test set.
Keywords :
automatic test software; AC faults; automatic test generator; catastrophic faults; fault coverage values; fault simulator; fault-based technique; faulty responses; hierarchical fault models; high cost; linear analog circuits; parametric faults; quantitative measure; simulation-assisted technique; specification testing; Analog circuits; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Costs; Frequency; Jacobian matrices; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-4490-7
Type :
conf
DOI :
10.1109/ICCAD.1993.580036
Filename :
580036
Link To Document :
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