DocumentCode :
3406080
Title :
Low power voltage limiter design for a full passive UHF RFID sensor
Author :
Fernandez, Eduardo ; Beriain, A. ; Solar, H. ; Garcia-Alonso, A. ; Berenguer, R. ; Sosa, J. ; Monzon, J.M. ; Garcia-Alonso, S. ; Montiel-Nelson, J.A.
Author_Institution :
Commun. IC Design Group (COMMIC), CEIT, San Sebastián, Spain
fYear :
2011
fDate :
7-10 Aug. 2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a low power voltage limiter design that avoids possible damages in the circuits of the analog front-end of the RFID sensor due to voltage surges whenever reader and tag are very close. The proposed voltage limiter design takes advantage of the implemented bandgap reference and voltage regulator in order to provide low temperature and process deviation of the limiting voltage. The measured limiting voltage is 2.9V with a voltage variation of only +/-0.025V for the four measured dies. The current consumption is only 150nA when the reader and the tag are far away one to each other, not limiting the sensitivity of the tag due to an undesired consumption in the voltage limiter. The circuit is implemented on a low cost 2P4M 0.35μm CMOS technology.
Keywords :
CMOS integrated circuits; UHF detectors; detector circuits; limiters; low-power electronics; power supply circuits; radiofrequency identification; CMOS technology; analog front end; current 150 nA; full passive UHF RFID sensor; low power voltage limiter; size 0.35 mum; voltage 2.9 V; Clocks; Demodulation; EPROM; Oscilloscopes; Solids;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
ISSN :
1548-3746
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2011.6026504
Filename :
6026504
Link To Document :
بازگشت