A linear tunable amplifier for implantable neural recording applications

Author

Rezaee-Dehsorkh, Hamidreza ; Ravanshad, Nassim ; Lotfi, Reza ; Mafinezhad, K.

Author_Institution

Dept. of Electr. Eng., Ferdowsi Univ. of Mashhad, Mashhad, Iran

fYear

2011

fDate

7-10 Aug. 2011

Firstpage

1

Lastpage

4

Abstract

A fully integrated tunable low-noise amplifier for neural recording applications is presented that is highly linear over the entire signal band. A modified system design is presented to optimize the area/noise/linearity performance. A novel pseudo-resistor with improved linearity is also proposed. This design, simulated in a 0.18-μm CMOS process, consumes 41.4 μW from a 1.8-V supply. The simulated integrated input-referred noise is 2.61 μV_rms over 300 Hz to 10 kHz. The amplifier also provides an output swing of 1 V_P-P with a total harmonic distortion of -43.61 dB at 300 Hz and -46.41 dB at 10 kHz.

Keywords

CMOS analogue integrated circuits; biomedical electronics; harmonic distortion; low noise amplifiers; neurophysiology; prosthetics; resistors; CMOS process; area noise linearity performance; implantable neural recording applications; integrated tunable low-noise amplifier; linear tunable amplifier; modified system design; pseudo-resistor; signal band; simulated integrated input-referred noise; total harmonic distortion; Biomedical measurements; Heating; Lead; Linearity; Logic gates; Noise measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on

Conference_Location

Seoul

ISSN

1548-3746

Print_ISBN

978-1-61284-856-3

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2011.6026523

Filename

6026523