DocumentCode :
3406546
Title :
A flexible real-time SAR processing platform for high resolution airborne image generation
Author :
Pfitzner, Martin ; Langemeyer, Stefan ; Pirsch, Peter ; Blume, Holger
Author_Institution :
Inst. of Microelectron. Syst., Leibniz Univ. Hannover, Hannover, Germany
Volume :
1
fYear :
2011
fDate :
24-27 Oct. 2011
Firstpage :
26
Lastpage :
29
Abstract :
A compact RISC/FPGA based hardware architecture for high resolution SAR signal processing is presented. Sensor data rates above 300 Mbit/s and image dimensions of 8k × 4k pixels are processed in real-time. A maximum power consumption of less than 16 W enables for usage on small UAVs.
Keywords :
airborne radar; field programmable gate arrays; radar imaging; synthetic aperture radar; UAV; compact RISC-FPGA based hardware architecture; flexible real-time SAR processing platform; high resolution SAR signal processing; high resolution airborne image generation; image dimensions; maximum power consumption; Computer architecture; Field programmable gate arrays; Hardware; Real time systems; SDRAM; Signal processing; Signal processing algorithms; FPGA; Real-time SAR; hardware architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radar (Radar), 2011 IEEE CIE International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-8444-7
Type :
conf
DOI :
10.1109/CIE-Radar.2011.6159467
Filename :
6159467
Link To Document :
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