Switch module design with application to two-dimensional segmentation design

Author

Zhu, K. ; Wong, D.F. ; Chang, Y.-W.

Author_Institution

Dept. of Comput. Sci., Texas Univ., Austin, TX, USA

fYear

1993

fDate

7-11 Nov. 1993

Firstpage

480

Lastpage

485

Abstract

We address the problem of designing switch modules for FPGAs and FPICs to maximize routability under area and delay constraints. The switch module design problem is closely related to two-dimensional segmentation design for FPGAs and FPICs. We study the properties of switch modules and present an algorithm for switch module design. We also present an algorithm to analyze the routability of a given switch module.

Keywords

field programmable gate arrays; FPGA; FPIC; area constraints; delay constraints; field programmable gate arrays; field programmable interconnect chips; routability; switch module design; switch modules; two-dimensional segmentation design; Algorithm design and analysis; Application software; Capacitance; Delay; Field programmable gate arrays; Routing; Solids; Switches; Symmetric matrices; Two dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on

Conference_Location

Santa Clara, CA, USA

Print_ISBN

0-8186-4490-7

Type

conf

DOI

10.1109/ICCAD.1993.580101

Filename

580101

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3406913