Performance analysis of multiplane, nonblocking ATM switches

Multiplane switches present a special interest in the field of ATM switching as they are high-performance scaleable architectures. Not only are they efficient in terms of performance but they also offer a high-degree of reliability, an issue which is very critical to ATM networks. We present a number of different switching architectures based on multiplane designs. We study and analyze them under various performance metrics, such as throughput, mean waiting time and cell drop probability, for which we derive exact analytical and numerical expressions, given a homogeneous traffic model. We elaborate also on their implementation suitability and the various tradeoffs that can emerge