Parallel multi-delay simulation

The multi-delay parallel (MDP) technique is a multi-delay logic simulation algorithm that uses no event-sorting mechanism. Wide bit-fields and bit-parallel operations are used to resolve out-of-order events. Although the MDP technique was designed to be implemented in hardware, the software version has proven to be competitive with ordinary multi-delay simulation. Two versions of the MDP technique are presented: fixed alignment and variable alignment. The fixed alignment algorithm uses bit-fields that are wide enough to capture any event that could occur during the simulation, while the variable alignment algorithm uses a minimum-width bit field.