DocumentCode
3407918
Title
Highly-integrated, quad bands ΔΣ fractional-N frequency synthesizer design in 0.18-μm standard CMOS process
Author
Chen, Cheng-Hung ; Lien, Wei-Cheng ; Jou, Christina F.
Author_Institution
Dept. of Commun. Eng., National Chiao Tung Univ., Hsinchu, Taiwan
Volume
3
fYear
2005
fDate
4-7 Dec. 2005
Abstract
A highly-integrated, quad bands frequency synthesizer (802.11a/b/g and GSM/DCS1800) is presented in this paper. This circuit is a single-path solution and the chip size is only half of the other dual-band frequency synthesizer works. By 50% frequency division technique, the quad-bands signals can be generated. Total power consumption for simultaneously quad-bands operation is 105mW, with apply voltage of 1.8V. Die area is 1.62mm2.
Keywords
CMOS integrated circuits; delta-sigma modulation; frequency dividers; frequency synthesizers; 0.18 micron; 1.8 V; 105 mW; CMOS process; dual-band frequency synthesizer; frequency division technique; quadbands frequency synthesizer; single-path solution; CMOS process; Circuit noise; Design engineering; Dual band; Frequency conversion; Frequency synthesizers; GSM; Signal design; Signal resolution; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN
0-7803-9433-X
Type
conf
DOI
10.1109/APMC.2005.1606582
Filename
1606582
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