Title :
An analytical model of scaled RC-dominant wires for high-speed wireline transceiver design
Author_Institution :
Adv. Design, Intel Corp., Hillsboro, OR, USA
Abstract :
This review paper explains modeling and analysis of RC-dominant wires for high-speed wireline transceiver design. A closed form formula derived from telegrapher´s equation accurately describes a frequency response of an RC-dominant wire, yet it is simple and intuitive for designers to easily understand design trade-offs without a complex numerical solver. This paper explains how the model is derived and can help designers in example transceiver designs.
Keywords :
RC circuits; integrated circuit design; integrated circuit interconnections; printed circuits; system-in-package; system-on-chip; transceivers; high speed wireline transceiver design; scaled RC dominant wire; telegrapher equation; Equations; Integrated circuit interconnections; SPICE; Transmitters;
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2011.6026620
