Title :
A 16-bit fixed-point digital signal processor for digital power converter control
Author :
O´Malley, E. ; Rinne, Karl
Author_Institution :
Dept. of Electron. & Comput. Eng., Limerick Univ.
Abstract :
This paper describes a novel and highly versatile reduced instruction set (RISC) based fixed-point digital signal processor (DSP). Its architecture, instruction set, and integrated programmable digital pulse width modulator (DPWM) have been optimized for digitally controlled switched mode power converters (SMPCs). Designed using the Verilog hardware description language (HDL), the prototype DSP integrated circuit (IC) was built on a standard 0.35 mum digital CMOS process (with a 20 K gate count). It occupies less then 1.5 mm2 and dissipates approximately 5 mW from a 3.3 V supply at 50 MIPs. The device provides a programmable and cost effective solution for digitally controlled SMPCs
Keywords :
CMOS digital integrated circuits; PWM power convertors; control engineering computing; digital control; digital signal processing chips; hardware description languages; power engineering computing; 0.35 mum; 16-bit fixed-point digital signal processor; 3.3 V; DPWM; DSP; HDL; Verilog hardware description language; digital CMOS process; digital power converter control; digitally controlled switched mode power converter; integrated circuit; integrated programmable digital pulse width modulator; reduced instruction set; CMOS digital integrated circuits; CMOS integrated circuits; Digital control; Digital modulation; Digital signal processing; Digital signal processors; Hardware design languages; Modulation coding; Pulse width modulation converters; Reduced instruction set computing;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 2005. APEC 2005. Twentieth Annual IEEE
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8975-1
DOI :
10.1109/APEC.2005.1452885