Defect density reduction on the VIISta 810 implanter

Semiconductor device designs for 0.18 micron line widths have increased sensitivity to defects generated by metal contamination, particles and wafer charging which can result from ion implantation. The VIISta 810 medium current implanter has been designed to minimize these undesirable processes. Heavy metal and aluminum contamination is reduced by the use of graphite electrodes and graphite liners in the steering magnets. The remaining aluminum in the beam path is coated with flame-sprayed silicon. Eliminating post-analysis acceleration mitigates accelerated metal contamination. Performance specifications for metal contamination are less than 50 ppm for aluminum and less than 5 ppm for all heavy metals. SIMS data is presented documenting this performance