Title :
Optimal body biasing for maximizing circuit performance in 65nm CMOS technology
Author :
Moradi, Farshad ; Tuan Vu Cao ; Wisland, D.T. ; Aunet, Snorre ; Mahmoodi, Hamid
Author_Institution :
Nanoelectronic Group, Univ. of Oslo, Oslo, Norway
Abstract :
In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-threshold designs. We show that for higher supply voltages, there is an optimum body voltage to get the maximum performance. The results for some Flip-Flops are shown.
Keywords :
CMOS integrated circuits; flip-flops; CMOS technology; circuit performance; flip-flops; maximum ON current; optimal body biasing; optimum body voltage; size 65 nm; super-threshold design; CMOS integrated circuits; CMOS technology; Equations; MOS devices; Reduced instruction set computing; Transistors; Wireless communication; 65nm; Body-biasing; nano-scale; sub-threshold;
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2011.6026651
