Title :
Near-threshold sequential circuits using Improved Clocked Adiabatic Logic in 45nm CMOS processes
Author :
Haiyan Ni ; Jianping Hu
Author_Institution :
Fac. of Inf. Sci. & Technol., Ningbo Univ., Ningbo, China
Abstract :
The paper presents adiabatic flip-flops and sequential circuits operating on near-threshold low voltages, which are realized with ICAL (Improved Clocked Adiabatic Logic) circuits. A near-threshold ICAL mode-10 counter with a single-phase power clock is implemented. Full-custom layouts of all circuits are drawn by Cadence Virtuoso layout editor with the NCSU FreePDK 45nm technology library. Full parasitic extraction is done by Calibre PEX parasitic extraction tool. Based on the post-layout simulations and the comparison with the CMOS counterparts, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.
Keywords :
CMOS logic circuits; flip-flops; low-power electronics; sequential circuits; CMOS processes; adiabatic flip-flops; full parasitic extraction; improved clocked adiabatic logic; near-threshold low voltages; near-threshold sequential circuits; single-phase power clock; CMOS integrated circuits; Clocks; Flip-flops; Logic gates; Semiconductor device modeling; Switches;
Conference_Titel :
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-61284-856-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2011.6026655
