A new heuristic algorithm for estimating signal and detection probabilities

Author

Al-Kharji, Musaed A. ; Al-Arian, Sami A.

Author_Institution

Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA

fYear

1997

fDate

13-15 Mar 1997

Firstpage

26

Lastpage

31

Abstract

The problem of computing signal probabilities of digital circuits arises in the context of random testing, pseudorandom testing, and testability analysis. This paper presents a simple but effective algorithm for estimating signal probabilities, which provides significantly better estimates of signal probabilities than the weighted averaging algorithm and most importantly is linear in the product of circuit size and the number of primary inputs. Based on this algorithm, the detection probabilities of stuck-at faults are estimated. Experimental results using ISCAS benchmark circuits show the effectiveness and the improvement of this technique over the simple algorithm as well as the weight averaging algorithm. The correlation coefficients of the results are extremely good and the algorithm is very fast

Keywords

VLSI; circuit analysis computing; combinational circuits; digital integrated circuits; fault diagnosis; integrated circuit testing; logic testing; probability; ISCAS benchmark circuits; VLSI testing; combinational network; correlation coefficients; digital circuits; fault detection probabilities; heuristic algorithm; possibilistic algorithm; pseudorandom testing; random testing; signal probabilities; stuck-at faults; testability analysis; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Computer networks; Fault detection; Heuristic algorithms; Signal analysis; Signal detection; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 1997. Proceedings. Seventh Great Lakes Symposium on

Conference_Location

Urbana-Champaign, IL

ISSN

1066-1395

Print_ISBN

0-8186-7904-2

Type

conf

DOI

10.1109/GLSV.1997.580406

Filename

580406