Title :
A new method for asynchronous pipeline control
Author :
Appleton, Sam S. ; Morton, Shannon V. ; Liebelt, Michael J.
Author_Institution :
Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
Abstract :
We explore the potential for enhanced performance in asynchronous pipelines by the elimination of unnecessary signalling from the critical path, thus making the common case fast. An improvement of 15% over an optimal two-phase signalling approach for both static and dynamic logic control is demonstrated. We describe extensions to the approach that add functionality with no cycle time overhead
Keywords :
CMOS logic circuits; VLSI; asynchronous circuits; pipeline processing; VLSI architecture; asynchronous pipeline control; dynamic logic control; flow controlled asynchronous method; static logic control; Computational modeling; Control systems; Degradation; Delay effects; Logic; Optical signal processing; Optimal control; Pipelines; Propagation delay; Protocols;
Conference_Titel :
VLSI, 1997. Proceedings. Seventh Great Lakes Symposium on
Conference_Location :
Urbana-Champaign, IL
Print_ISBN :
0-8186-7904-2
DOI :
10.1109/GLSV.1997.580418
