DocumentCode
3409332
Title
Scratchpad Memories in the Context of Process Scaling
Author
Redd, Bennion ; Kellis, Spencer ; Gaskin, Nathaniel ; Brown, Rebecca
Author_Institution
Electr. & Comput. Eng. Dept., Univ. of Utah, Salt Lake City, UT, USA
fYear
2011
fDate
7-10 Aug. 2011
Firstpage
1
Lastpage
4
Abstract
Scratchpad memories have been shown to reduce power consumption, but the different characteristics of nanometer scale processes such as increased leakage power motivate an examination of how the benefits of these memories change with process scaling. Awareness of process trends and application characteristics can help designers predict the energy savings likely to result from the use of a scratchpad memory. CACTI simulations show that leakage, as a percentage of total power, may increase, particularly for applications with few memory accesses per second. Measurements from the 0.18 μm and 65 nm versions of the WIMS Microprocessor demonstrate that scratchpad memories will continue to benefit many applications, even with increased leakage energy, for the foreseeable future.
Keywords
power consumption; random-access storage; CACTI simulation; WIMS microprocessor; energy saving; leakage energy; leakage power; nanometer scale process; power consumption; process scaling; scratchpad memory; Energy measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2011 IEEE 54th International Midwest Symposium on
Conference_Location
Seoul
ISSN
1548-3746
Print_ISBN
978-1-61284-856-3
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2011.6026676
Filename
6026676
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