Reduced complexity CORDIC demodulator implementation for D-AMPS and digital IF-sampled receiver

Wireless mobile receivers and hand-held terminals have experienced tremendous growth. Especially, DAMPS (Digital American Mobile Phone System) has a tremendous market share in the cellular phone community. Mobile receiver designers feel the need to keep the cost of design low while maintaining a high performance, and to have a digital sub-system which uses DSP algorithms to provide immunity to multipath fading problem. A novel approach for VLSI realization of a reduced complexity of CORDIC (coordinate rotation digital computer) algorithm for DAMPS or a digital IF-sampled receiver is presented. It is intended to be suitable for the inexpensive realization of a demodulator, which is part of the D-AMPS modem within a VLSI chip. The reduced complexity CORDIC algorithm offers several advantages. First, it only uses one barrel shifter compared to the method of Chen, McDanell, Boytim and Pogue (see Proceedings IEEE Globecom, Singapore, 1995) with two barrel shifters. Also, the barrel shifter only needs to provide even shifts in the algorithm. Second, with a small input data, it can avoid the numerical problem. The scaling factors can be computed at the end of the CORDIC iterations instead of at every iteration. Overall, the algorithm is computationally efficient and conceptually simple with half complexity of previous schemes