Design of hardware fault tolerant control architecture for Wind Energy Conversion System with DFIG based on reliability analysis

This paper presents a fault tolerant converter topology for grid connected Wind Energy Conversion System (WECS) with Doubly Fed Induction Generator (DFIG) based on hardware redundancy. This topology allows hardware compensation of one faulty semiconductor by using isolating and connecting devices. It is based on a unique redundant leg for both back to back converters. A reliability analysis integrating the semiconductor switching is presented with a modelling method based on Markov Chain model in order to determine off-line the efficiency of the fault tolerant topology against failures. Application results are presented on the WECS.