Dynamic voltage and frequency management for a low-power embedded microprocessor

Author

Akui, Satoshi ; Seno, Katsunori ; Nakai, Masakatsu ; Meguro, Tetsumasa ; Seki, Takahiro ; Kondo, Tetsuo ; Hashiguchi, Akihiko ; Kawahara, Hirokazu ; Kumano, Kazuo ; Shimura, Masayuki

Author_Institution

Sony, Tokyo, Japan

fYear

2004

fDate

15-19 Feb. 2004

Firstpage

64

Abstract

A dynamic voltage and frequency management scheme that autonomously controls the clock frequency (8 to 123 MHz at 0.5 MHz step) and adaptively controls the voltage (0.9 to 1.6 V at 5 mV step) with a leakage power compensation effect is developed for a low-power embedded microprocessor. It achieves 82% power reduction in personal information manager (PIM) application.

Keywords

adaptive control; clocks; compensation; frequency control; integrated circuit design; leakage currents; low-power electronics; microprocessor chips; personal information systems; voltage control; 0.9 to 1.6 V; 8 to 123 MHz; PIM; adaptive voltage control; autonomous clock frequency control; dynamic frequency management; dynamic voltage management; leakage power compensation effect; low-power embedded microprocessor; personal information manager application; power reduction; Clocks; Delay; Detectors; Digital-to-frequency converters; Frequency; Large scale integration; Microprocessors; Monitoring; Synthesizers; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International

ISSN

0193-6530

Print_ISBN

0-7803-8267-6

Type

conf

DOI

10.1109/ISSCC.2004.1332595

Filename

1332595