• DocumentCode
    3411528
  • Title

    A cascaded continuous-time ΣΔ modulator with 67dB dynamic range in 10MHz bandwidth

  • Author

    Breems, Lucien J.

  • Author_Institution
    Philips Res., Eindhoven, Netherlands
  • fYear
    2004
  • fDate
    15-19 Feb. 2004
  • Firstpage
    72
  • Abstract
    A 2-2 cascaded ΣΔ modulator with continuous-time loop filters and 4b quantizers is presented. The dynamic range is 67dB in a 10MHz bandwidth at a 160MS/s with a full-scale input range of 200mVrms. Inherent anti-aliasing filtering is over 50dB. The 0.18μm CMOS chip measures 1.7mm2 and draws 68mA from a 1.8V supply.
  • Keywords
    CMOS integrated circuits; calibration; cascade networks; continuous time filters; phase locked loops; quantisation (signal); sigma-delta modulation; 1.8 V; 10 MHz; CMOS chip; adaptive calibration; cascaded continuous-time modulator; continuous-time loop filters; dynamic range; inherent antialiasing filtering; power consumption; prototype chip; quantizers; sigma-delta modulator; Bandwidth; Delta modulation; Delta-sigma modulation; Digital filters; Dynamic range; Filtering; IIR filters; Quantization; Resonator filters; Signal resolution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8267-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2004.1332599
  • Filename
    1332599
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3411528