Title :
A 25 MS/s 14 b 200 mW ΣΔ modulator in 0.18 μm CMOS
Author :
Balmelli, Pio ; Qiuting Huang
Author_Institution :
Integrated Syst. Lab., Eidgenossische Tech. Hochschule, Zurich, Switzerland
Abstract :
Sampled at 200 MHz, a 5th-order 4 b-quantizer single-loop ΣΔ modulator achieves a 25 MS/s conversion rate with 84 dB DR and 82 dB SNR, a performance suitable for VDSL. Implemented in 0.18 μm CMOS, the 0.95 mm2 chip has a power consumption of 200 mW from a 1.8 V supply.
Keywords :
CMOS integrated circuits; digital subscriber lines; integrated circuit design; integrated circuit noise; low-power electronics; quantisation (signal); sigma-delta modulation; signal sampling; ΣΔ modulator; 0.18 micron; 1.8 V; 14 bit; 200 MHz; 200 mW; CMOS implementation; SNR; VDSL; chip power consumption; conversion rate; fifth-order quantizer; single-loop sigma-delta modulator; Bandwidth; Capacitors; Delta modulation; Feedback; Filters; Modems; Noise shaping; Sampling methods; Signal resolution; Transfer functions;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332600
