A 2 mW 89 dB DR continuous-time ΣΔ ADC with increased immunity to wide-band interferers

Author

Philips, K. ; Nuijten, P.A.C.M. ; Roovers, R. ; Munoz, F. ; Tejero, M. ; Torralba, A.

Author_Institution

Philips Res. Labs., Eindhoven, Netherlands

fYear

2004

fDate

15-19 Feb. 2004

Firstpage

86

Abstract

A continuous-time ΣΔ ADC with merged channel filter and programmable-gain functionality is presented. Interferers above full-scale can be applied without jeopardizing reception of weak desired signals. The merged design occupies 0.14 mm² in 0.18 μm CMOS, consumes 2 mW, and achieves 89 dB of dynamic range (DR) in a 1 MHz bandwidth.

Keywords

CMOS integrated circuits; continuous time filters; integrated circuit design; integrated circuit measurement; low-power electronics; radiofrequency interference; sigma-delta modulation; 0.18 micron; 1 MHz; 2 mW; CMOS design; above full-scale interferers; bandwidth; continuous-time ΣΔ ADC; continuous-time sigma-delta ADC; dynamic range; merged channel filter; programmable-gain functionality; weak desired signal reception; wide-band interferer immunity; Bandwidth; Baseband; Dynamic range; Electronics packaging; Feedback; Filtering; Gain control; Low pass filters; Transfer functions; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International

ISSN

0193-6530

Print_ISBN

0-7803-8267-6

Type

conf

DOI

10.1109/ISSCC.2004.1332606

Filename

1332606