DocumentCode :
3411793
Title :
A low phase noise 2 GHz VCO using 0.13 μm CMOS process
Author :
Choi, Jinsung ; Ryu, Seonghan ; Kim, Huijung ; Kim, Bumman
Author_Institution :
Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., China
Volume :
4
fYear :
2005
fDate :
4-7 Dec. 2005
Abstract :
A 2 GHz LC VCO with a large improvement in phase noise is designed and implemented in 0.13μm CMOS process. It has phase noise of -100.7 dBc/Hz, -130.6 dBc/Hz, and -140.8 dBc/Hz at 100 kHz, 1 MHz, and 3 MHz offset frequencies from the carrier, respectively. The phase noise reduction of about 10 dB is observed for all controllable voltage range, as compared with a comparable conventional VCO. This VCO consumes 3.29 mA from a 1.8 V supply with the silicon area of 500 μm × 850 μm.
Keywords :
CMOS analogue integrated circuits; network synthesis; phase noise; voltage-controlled oscillators; 0.13 micron; 1 MHz; 1.8 V; 100 kHz; 2 GHz; 3 MHz; 3.29 mA; CMOS; LC VCO; Si; controllable voltage; low phase noise VCO; CMOS process; Filtering; Frequency; Noise measurement; Phase noise; Power harmonic filters; Tail; Tuning; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings
Print_ISBN :
0-7803-9433-X
Type :
conf
DOI :
10.1109/APMC.2005.1606779
Filename :
1606779
Link To Document :
بازگشت