DocumentCode :
341216
Title :
Digital demodulator implementation parameters evaluated by simulation
Author :
Heald, Andrew B. ; Scott, Neil L. ; Vaughan, Rodney G.
Author_Institution :
Commun. Group, Ind. Res. Ltd., Lower Hutt, New Zealand
Volume :
2
fYear :
1998
fDate :
1998
Firstpage :
1303
Abstract :
The performance of DSP receivers for digital communications is evaluated by computer simulation. The modulation is fast frequency shift keying. The confidence levels for the BER estimates are described and the parameters of interest are presented graphically. The effect of quantizer resolution, sample rate, signal level and synchronization timing error are quantified. The approach allows guidelines for the DSP designer who must otherwise implement a receiver within the constraints of a system design which typically compromises power consumption and component cost
Keywords :
demodulation; digital communication; error statistics; minimum shift keying; quantisation (signal); receivers; signal resolution; signal sampling; synchronisation; BER estimates; DSP receivers; digital communications; digital demodulator implementation parameters; fast frequency shift keying; quantizer resolution; sample rate; signal level; simulation; synchronization timing error; system design; Bit error rate; Computer simulation; Demodulation; Digital communication; Digital signal processing; Frequency modulation; Frequency shift keying; Frequency synchronization; Signal resolution; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 1998. GLOBECOM 1998. The Bridge to Global Integration. IEEE
Conference_Location :
Sydney,NSW
Print_ISBN :
0-7803-4984-9
Type :
conf
DOI :
10.1109/GLOCOM.1998.776929
Filename :
776929
Link To Document :
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