Title :
Host-compiled simulation of multi-core platforms
Author :
Gerstlauer, Andreas
Author_Institution :
Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas, 78712
Abstract :
Virtual platform models are a popular approach for virtual prototyping of multi-processor/multi-core systems-on-chip (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled models promise to fill this gap by providing both fast and accurate platform simulation and prototyping. In this paper, we aim to provide an overview of state-of-the-art host-compiled platform modeling concepts, techniques and their applicability and benefits.
Keywords :
Accuracy; Computational modeling; Computer architecture; Hardware; Predictive models; Protocols; Timing;
Conference_Titel :
Rapid System Prototyping (RSP), 2010 21st IEEE International Symposium on
Conference_Location :
Fairfax, VA, USA
Print_ISBN :
978-1-4244-7073-0
Electronic_ISBN :
978-1-4244-7072-3
DOI :
10.1109/RSP.2010.5656355
